2nd HIPEAC Workshop on Energy Efficiency with Heterogeneous Computing (EEHCO 2016)

How do we make a SoC that combines all these computing resources more energy efficient ?

Collocated with the European Network of Excellence on High Performance and Embedded Architecture and Compilation January 18-20, 2016, Prague, Czech Republic

Energy efficiency is one of the primary design constraints for electronic systems. New technologies that combine different types of cores or similar cores with different computation capabilities can result in a better matching between the workload and the execution hardware improving overall system energy efficiency. New challenges emerge since, for example, it is necessary to map algorithms to different core types potentially at run-time and move the execution environment without impacting performance.

This workshop invites researchers to present initial results showing novel ways to obtain energy efficiency when computation is performed with a combination of different core types such as GPUs (Graphics Processing Units), CPUs (Central Processing Unit) and RPUs (Reconfigurable Processing Units). A heterogeneous system can include any number of two or more of these different processing units (e.g. programmable processors with embedded GPU or FPGA fabrics) or also be formed with cores capable of executing a common instruction set but with different performance levels and energy requirements (e.g. ARM big.LITTLE). Specially interesting is how to use portable programming models such as OpenCL to target these different computing resources with a single piece of code. Papers will be published online in this website but not in proceedings. Submitting to EEHCO will not preclude future publication opportunities. Selected papers will be invited to submit an extended version to the IET CDT journal


Extended submission deadlineNovember 22nd , 2015

Extended notification of acceptanceDecember 6th , 2015

Final version due December 15th , 2015


Paper submission through the following easychair link .




Under a common theme of adaptability and heterogeneity, topics of interest include :

Energy-efficient heterogeneous system architecture.

Programming models, tools, languages and compilers to support energy-aware heterogeneous computing systems.

Energy management in operating systems and runtime systems

Run-time reconfiguration for energy-efficiency.

Monitoring tools and power models that can be used to predict power consumption in a core using a different type of core.

Energy management of the memory sub-system, display, peripherals.

Energy-proportional systems.

Interactions of performance, reliability and energy management.

Interplay between static/dynamic energy and thermal-aware computing.

Algorithms and hardware architectures for reduced power, energy and heat.

Evaluation of variations of sleep-mode, race-to-halt and slow-down computing

Energy trade-offs between communication and computation